The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 1991

Filed:

Nov. 22, 1988
Applicant:
Inventors:

Robert S Blewer, Albuquerque, NM (US);

Terry R Gullinger, Albuquerque, NM (US);

Michael J Kelly, Albuquerque, NM (US);

Sylvia S Tsao, Albuquerque, NM (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437187 ; 437 33 ; 437 61 ; 437 62 ; 437170 ; 156657 ;
Abstract

A method of forming a multiple level porous silicon substrate for semiconductor integrated circuits including anodizing non-porous silicon layers of a multi-layer silicon substrate to form multiple levels of porous silicon. At least one porous silicon layer is then oxidized to form an insulating layer and at least one other layer of porous silicon beneath the insulating layer is metallized to form a buried conductive layer. Preferably the insulating layer and conductive layer are separated by an anodization barrier formed of non-porous silicon. By etching through the anodization barrier and subsequently forming a metallized conductive layer, a fully or partially insulated buried conductor may be fabricated under single crystal silicon.


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