The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 1991

Filed:

May. 01, 1989
Applicant:
Inventors:

Karen A Grim, Reading, PA (US);

Shobha Singh, Summit, NJ (US);

LeGrand G Van Uitert, Morristown, NJ (US);

George J Zydzik, Columbia, NJ (US);

Assignee:

AT&T Bell Laboratories, Murray Hill, NJ (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
437247 ; 437248 ; 437927 ; 148D / ; 148D / ; 432253 ; 4322541 ; 118 501 ; 118620 ; 118733 ;
Abstract

This invention is directed to the fabrication of semiconductor devices, especially those comprising III-V and II-VI compound semiconductor materials, and involves Rapid Thermal Annealing (RTA) of semiconductor wafers, especially those implanted with a dopant(s). The invention is also concerned with a black-box implement used in combination with the RTA. The process includes enclosing a wafer to be annealed within a 'black-box' comprising components of a black body material and subjecting the black box with the wafer therein to an RTA. In a preferred embodiment the RTA comprises (a) a pre-anneal step which includes heating to a temperature and for a period sufficient to preheat the wafer so as to reduce thermal shock due to a main annealing step, (b) the main annealing step being at a temperature and for a period sufficient to remove damage caused to said surface by the dopant implantation and to activate implanted dopant, and (c) a post-anneal step carried out at a temperature and for a period sufficient to relieve stresses which may result from the main-annealing step. The combined use of the RTA and the black box leads to wafers substantially free or slip lines and with reproducibly high mobilities and uniform activation.


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