The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 1991

Filed:

Jan. 24, 1990
Applicant:
Inventors:

Anthony J Abrami, Poughkeepsie, NY (US);

Stuart H Bullard, Pleasant Valley, NY (US);

Santiago E del Puerto, Wappingers Falls, NY (US);

Paul M Gaschke, Pleasantville, NY (US);

Mark R LaForce, Pleasant Valley, NY (US);

Paul J Roggemann, Hopewell Junction, NY (US);

Kort F Longenbach, New York City, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R / ; H05B / ;
U.S. Cl.
CPC ...
3241 / ; 219464 ; 219483 ; 324 731 ;
Abstract

A wafer chuck temperature control system is disclosed for use in a semiconductor wafer testing apparatus. The wafer chuck is divided into a plurality of temperature sensor and cooling element domains corresponding to chip location regions of an overlying undiced wafer being tested. Computer scanning of the sensors determines which domain is the one harboring the heat source (chip under test) and selects the same for connection to a closed loop temperature control feedback servo. Provision also is made for introducing a helium gas interface between the wafer and the chuck by placing annular grooves in the face of the chuck through which the helium flows when the wafer is vacuum-seated against the chuck. A predetermined helium gas flow rate is maintained to preserve vacuum holddown and to optimize the thermal resistance of the wafer-chuck interface.


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