The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 22, 1991
Filed:
Jul. 19, 1988
Alp Malazgirt, Fremont, CA (US);
Bala Padmakumar, Sunnyvale, CA (US);
Arya Bhattacherjee, Fremont, CA (US);
Cypress Semiconductor Corp., San Jose, CA (US);
Abstract
A method of manufacturing an integrated circuit having a multilayer structure where the method includes the steps of depositing a thin layer of low temperature oxide (LTO) on top of conductors and then spinning and curing a thin layer of spin-on-glass to planarize the surface of the device. This structure is then plasma etched to remove the spin-on-glass and a portion of the LTO at approximately the same rate. The structure is then dipped in a mild potassium hydroxide solution to completely remove the SOG material, even from the crevices and gaps which are present on the surface. This enables the device to be manufactured free of any organic substances from the SOG in the body of the structure. A passivation layer can now be deposited to protect the underlying circuitry from ionic contamination, water vapor penetration and handling.