The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 08, 1991

Filed:

Dec. 11, 1986
Applicant:
Inventors:

Brian M Ditchek, Milford, MA (US);

Adrian I Cogan, San Jose, CA (US);

Enid K Sichel, Lincoln, MA (US);

Walter L Bloss, III, Palos Verdes, CA (US);

Assignee:

GTE Laboratories Incorporated, Waltham, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
357 22 ; 357 15 ; 357-7 ; 357 60 ; 357 55 ; 357 88 ;
Abstract

A semiconductor device, specifically an FET, having a body which includes a matrix of semiconductor material, specifically silicon, having an array of individual rods of conductive material, specifically TaSi.sub.2, disposed therein. The rods form Schottky barriers with the semiconductor material. A gate contact is made to several of the rods at one end, and source and drain contacts are made to the matrix of semicondcutor material. Current flow in the semiconductor material of the matrix between the source and the drain is controlled by applying biasing potential to the gate contact to enlarge the depletion zones around the rods.


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