The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 1990
Filed:
May. 02, 1989
Jack Sliwa, Los Altos Hills, CA (US);
Mohammad Farnaam, Santa Clara, CA (US);
Pankaj Dixit, Sunnyvale, CA (US);
Lewis N Shen, Cupertino, CA (US);
Advanced Micro Devices, Inc., , CA (US);
Abstract
An interconnect (16',18', 18'), whose interlevel contacts comprise refractory (10) to refractory or refractory to semiconductor substrate (13) interfaces, comprises patterned refractory core portions (10), consisting of tungsten or molybdenum, having top portions (10a) and opposed side portions (10b), provided with sidewall spacers (32a) of aluminum, gold or copper or alloys thereof and formed on surfaces (12a) of insulating layers (12). The sidewall spacers afford lateral low resistivity cladding of the refractory portions as well as suppression of the electromigration failure modes of voiding and whiskering, while leaving the top portion of the core portions available for refractory to refractory contacts and the bottom portion of the core portions available for refractory to refractory or refractory to silicon contacts. In this manner, an interconnect system is provided which has low electrical resistivity but which avoids the much poorer electromigration performance associated with aluminum to aluminum, aluminum to silicon, or aluminum to refractory contact-making as well as with industry-standard bilayer structures comprising refractory/aluminum for interconnect-making.