The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 1989

Filed:

Jan. 29, 1987
Applicant:
Inventors:

Atsuomi Hirata, Nara, JP;

Hirokuni Mamiya, Yokkaichi, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
357 72 ; 357 74 ; 174 525 ;
Abstract

A novel plastic molded chip carrier package for an integrated circuit chip has a carrier member molded of a plastic material to which are integrally embedded a plurality of I/O pins and a conductor member for interconnection between the terminals of the chip and the corresponding I/O pins to provide a unitary construction obtained at a single molding process. This plastic molded chip carrier package is preferred to have integral positioning studs which project in the same direction of the I/O pins for abutment against a printed circuit board for mounting the package in a spaced relation thereto with the I/O pins plugged into metallized through holes provided in the board. A method of fabricating the plastic chip carrier package is also disclosed to comprise the steps of placing a plurality of I/O pins into corresponding vertical slots formed in a molding die with the top portion of the I/O pins projecting above the molding die surface; supporting a conductor member on the I/O pins with the distal top ends of the I/O pins extending into correspondingly through holes formed in the conductor member, the conductor member including a plurality of conductor lines for electrical interconnection between the individual I/O pins and the terminals of the chip; and filling a molten plastic material at least between the conductor member and the molding die surface and solidifying the same so as to form thereat a plastic carrier member to which the conductor member is integrally embedded together with the top portions of the I/O pins.


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