The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 01, 1988
Filed:
Nov. 10, 1986
Heike Gierisch, Unterschleissheim, DE;
Franz Neppl, Munich, DE;
Siemens Aktiengesellschaft, Berlin and Munich, DE;
Abstract
A process for the production of highly integrated circuits contaiining p- and n-channel MOS transistors including gate electrodes which consist of a doped double layer of polysilicon and metal silicide. The gates are doped with boron and are produced by diffusion from the metal silicide layer which has previously been doped with boron by ion implantation into the undoped polysilicon layer. The metal silicide layer preferably consisting of tantalum silicide is provided with a masking layer consisting of SiO.sub.2, and the structuring of the boron-doped silicide gate and the masking layer is carried out after the boron atoms have been diffused in. The process serves to safely avoid undesired boron penetration effects which considerably influence the short channel properties of the transistors. The process is used for the production of CMOS-circuits having a high packing density.