The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 16, 1985

Filed:

Jan. 17, 1983
Applicant:
Inventors:

Ulrich Schwabe, Munich, DE;

Franz Neppl, Munich, DE;

Konrad Hieber, Munich, DE;

Assignee:

Siemens Aktiengesellschaft, Berlin & Munich, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
29571 ; 357 67 ; 357 71 ; 148174 ;
Abstract

A method for the manufacture of integrated MOS-field effect transistor circuits in silicon gate technology and wherein diffusion source and drain zones are coated with a high melting point silicide as low-impedance printed conductors. The diffusion zones and polysilicon gates are made low-impedance through selective deposition of the metal silicide onto surfaces thereof. The selective deposition, which proceeds by use of a reaction gas eliminating hydrogen halide, simplifies the process sequence and is fully compatible with conventional silicon gate processes. Because of the high temperature stability, preferably tantalum silicide is employed. The invention is useful in the manufacture of MOS-circuits in VLSI-technology.


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