Method for forming recessed isolated regions

Abstract

A method is described for forming the recessed dielectric isolation in a silicon substrate involves first forming trenches which may be less than about 1 micron in depth in areas of one principal surface of the silicon substrate where isolation is desired. Where, for example, an NPN bipolar transistor structure is planned to be formed it is usually necessary to have a P+ region underneath the recessed dielectric isolation to allow full isolation between the various bipolar transistor devices. A PNP transistor uses an N+ region underneath the isolation. Where a field effect transistor is planned a channel stop can be substituted for the P+ region. Under the circumstance of bipolar devices, the P+ region is formed in the substrate prior to the deposition of an epitaxial layer thereover. The trench formation is caused to be formed through the epitaxial layer and into the P+ regions therein. The surface of the trenches are then oxidized in an oxidizing ambient to form a silicon dioxide layer thereon. A glass is deposited over this principal surface. The glass used has a thermal coefficient of expansion that approximates that of silicon and has a softening temperature of less than about 1200.degree. C. The structure is then heated to a temperature that allows the flow of the deposited glass on the surface so as to fill the trenches. The glass on the principal surface above the trench can be removed by a reactive ion etching method. Alternatively and preferably, the glass is removed from areas other than the immediate area of the trench by lithography and etching techniques followed by a second heating of the structure to cause the glass flow to result in surface planarization.