The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 14, 1980
Filed:
Feb. 12, 1979
Shuichi Sato, Beaverton, OR (US);
Tadanori Yamaguchi, Hillsboro, OR (US);
Tektronix, Inc., Beaverton, OR (US);
Abstract
An improved, high speed n-channel MOS inverter structure including a self-aligned silicon gate depletion-mode load device integrated in series with a nonplanar, submicron channel enhancement-mode switching transistor. The enhancement-mode switching device is formed on a field of the substrate that includes an elevated, plateau region joined to a surrounding planar area by a slope. The MOS load transistor is formed on an adjoining planar portion of the surface. The process for fabricating the devices features successive ion implation of boron and arsenic through an oxide layer that includes a smoothly tapered 'beak' formed by a local oxidation technique.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile