The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 1979

Filed:

Nov. 01, 1977
Applicant:
Inventors:

Fred K Buelow, Los Altos Hills, CA (US);

John J Zasio, Sunnyvale, CA (US);

Laurence H Cooke, Cupertino, CA (US);

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
A61K / ;
U.S. Cl.
CPC ...
2504 / ; 2504 / ;
Abstract

An electron beam exposure apparatus and method for use in fabricating semiconductor devices. A chip pattern larger in area than the electron beam scan field is divided into and exposed in a number of smaller parts (called partitions). The work piece on which the chip pattern is to be formed is moved relative to the scan field to enable each partition to be individually scanned at a different work piece position. The scan field, with the work piece positioned to scan one partition, overlaps onto and establishes a boundary region on an adjacent partition. Portions of chip patterns which lie in a boundary region are selectively scanned in connection with one or another of the abutting partitions. Portions of chip patterns falling in the boundary regions are selected for scanning in one or the other of adjacent partitions so as to minimize the number of divisions and so as to avoid dividing the pattern along critical dimensions.


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