The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 28, 1976

Filed:

Jan. 18, 1974
Applicant:
Inventors:

Walter H Schroen, Dallas, TX (US);

Francois A Padovani, Dallas, TX (US);

Hanspeter P Hentzschel, Reutlingen, DT;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
B01D / ;
U.S. Cl.
CPC ...
427 39 ; 427 88 ; 427299 ; 427309 ;
Abstract

Ohmic contacts to semiconductor surfaces are fabricated by a process which includes the formation of an adherent, uniform insulating film at the interface between the semiconductor surface and the metallization layer. The insulating film contains stationary charges of sign opposite to the sign of the conductivity of the semiconductor whereby image charges are introduced in the semiconductor. These image charges are located near the semiconductor surface and are of sufficient density to induce the formation of an accumulation layer. The minimum charge density required in the insulating layer is determined by the density of the surface states, Q.sub.ss, in the semiconductor. Minimum Q.sub.ss for silicon is about 5 .times. 10.sup.10 charges/cm.sup.2. The structure thus formed will present an electrical resistance resulting almost solely from the tunneling resistance of the insulating layer. Such a resistance is far smaller than the resistance one would observe in a structure consisting only of the semiconductor and metallization layer because the resistance of the structure is dominated by the resistance of the Schottky barrier formed at the metal-semiconductor interface. For example, just prior to metallization, an oxide-masked silicon wafer is subjected to argon ion bombardment for surface cleaning and activation, followed by oxygen ion bombardment for a time sufficient to form a uniform layer of silicon oxide having a thickness on the order of about 20 Angstroms. Subsequent metallization produces a specific contact resistance of about 5 .times. 10.sup.-.sup.7 ohm-cm.sup.2 on a silicon region having a resistivity of 1.0 ohm-cm, without previous contact diffusion or subsequent metal-semiconductor annealing.


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Schroen, Walter. (1976). Metal-semiconductor ohmic contacts and methods of fabrication (U.S. Patent No. 3983264). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/3983264

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