The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2026

Filed:

Sep. 22, 2023
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Tsung-Sheng Kang, Ballston Lake, NY (US);

Tao Li, Slingerlands, NY (US);

Ruilong Xie, Niskayuna, NY (US);

Nicolas Jean Loubet, Guilderland, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 84/83 (2025.01); H10D 30/43 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 84/85 (2025.01);
U.S. Cl.
CPC ...
H10D 84/83 (2025.01); H10D 30/43 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/121 (2025.01); H10D 84/85 (2025.01);
Abstract

A semiconductor structure is provided that includes stacked field effect transistors (FETs) that have different shaped inner spacers. Notably, the stacked FETs include a first FET having a horizontal inner spacer and a second FET stacked over the first FET and having a fork shaped inner spacer. The present application also provides a method of forming such as a semiconductor structure. The method avoids gate dielectric spacer fang formation in the source/drain regions and thus avoids problems with forming the stacked nanosheet structure of the first FET.


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Quick Actions:

Kang, Tsung-Sheng. (2026). Stacked fets containing different shaped inner spacers (U.S. Patent No. 12796067). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12796067

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