The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2026

Filed:

Oct. 18, 2024
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Thomas Aichinger, Faak am See, AT;

Dethard Peters, Höchstadt, DE;

Michael Hell, Erlangen, DE;

Andreas Hürner, Heroldsberg, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/66 (2025.01); G01R 19/165 (2006.01); H03K 17/082 (2006.01); H10D 12/00 (2025.01); H10D 62/832 (2025.01); H03K 17/08 (2006.01);
U.S. Cl.
CPC ...
H10D 30/669 (2025.01); G01R 19/16519 (2013.01); H03K 17/0822 (2013.01); H03K 17/0828 (2013.01); H10D 12/441 (2025.01); H10D 12/481 (2025.01); H10D 30/668 (2025.01); H10D 62/8325 (2025.01); H03K 2017/0806 (2013.01); H03K 2217/0027 (2013.01); H03K 2217/0054 (2013.01);
Abstract

A vertical power semiconductor device includes a silicon carbide (SiC) semiconductor body having opposite first and second surfaces. The SiC semiconductor body includes a transistor cell area including gate structures, a gate pad area, and an interconnection area electrically coupling a gate electrode of the gate structures and a gate pad of the gate pad area via a gate interconnection. The vertical power semiconductor device further includes a sensor electrode and a first interlayer dielectric having a first interface to the sensor electrode and a second interface to at least one of the gate electrode or the gate interconnection. A conduction band offset at the first interface ranges from 1 eV to 2.5 eV. The vertical power semiconductor device further includes a second interface to at least one of the gate electrode or the gate interconnection. The second interlayer dielectric laterally adjoins to the first interlayer dielectric.


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Aichinger, Thomas. (2026). Vertical power semiconductor device including a sensor electrode (U.S. Patent No. 12795991). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12795991

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