The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2026

Filed:

Jan. 04, 2024
Applicant:

United Microelectronics Corp., Hsin-Chu City, TW;

Inventors:

Fu-Shou Tsai, Keelung City, TW;

Chau-Chung Hou, Kaohsiung City, TW;

Yong-Yi Lin, Miaoli County, TW;

Yang-Ju Lu, Changhua County, TW;

Yu-Lung Shih, Tainan City, TW;

Ren-Peng Huang, Tainan City, TW;

Ching-Yang Chuang, Pingtung County, TW;

Assignee:

UNITED MICROELECTRONICS CORP., Hsin-Chu City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 61/00 (2023.01);
U.S. Cl.
CPC ...
H10B 61/00 (2023.02);
Abstract

A method of forming a semiconductor structure. A memory structure is formed on a substrate in the memory array region. A dielectric layer is deposited over the memory array region and peripheral region to cover the memory structure. A reverse etching process is performed to remove part of the dielectric layer from the central area of the memory array region, thereby forming an upwardly protruding wall structure along perimeter of the memory array region. The remaining thickness of the dielectric layer in the central area is equal to the sum of a polishing buffer thickness and a target thickness. A first polishing process is performed to remove the upwardly protruding wall structure from the memory array region. A second polishing process is performed to remove upper portion of the dielectric layer with the polishing buffer thickness from the memory array region.


Find Patent Forward Citations

Quick Actions:

Tsai, Fu-Shou. (2026). Method for forming a memory structure (U.S. Patent No. 12795946). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12795946

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…