Cell region having three-state inverting circuit coupled between a reference voltage and a non-reference-voltage signal and method of manufacturing same

Abstract

A circuit includes: first and second inverters configured correspondingly to receive first and second pin-signals and to generate inversions of first and second pin-signals, the first and second pin-signals correspondingly being first and second input signals of the circuit; and a three-state inverting sub-circuit including first and second data transistors and a sleep transistor, a control terminal of each of the first and second data transistors being coupled to a first node having the inversion of the second pin-signal, a control terminal of the sleep transistor being coupled to a second node having the inversion the first pin-signal, and the first and second data transistors and the sleep transistor being coupled in series between a third node having a first reference voltage and a fourth node having a non-reference-voltage (NRV) signal.