The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2026

Filed:

Sep. 28, 2023
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Manasa Medikonda, Albany, NY (US);

Tao Li, Slingerlands, NY (US);

Ruilong Xie, Niskayuna, NY (US);

Joshua M. Rubin, Albany, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2023.01); H01L 23/00 (2006.01); H01L 23/48 (2006.01); H01L 23/538 (2006.01); H01L 25/00 (2006.01); H10B 80/00 (2026.01); H10W 20/20 (2026.01); H10W 70/60 (2026.01); H10W 70/63 (2026.01); H10W 70/65 (2026.01); H10W 72/20 (2026.01); H10W 90/00 (2026.01); H10W 74/15 (2026.01); H10W 90/20 (2026.01);
U.S. Cl.
CPC ...
H10W 90/00 (2026.01); H10B 80/00 (2023.02); H10W 20/20 (2026.01); H10W 70/611 (2026.01); H10W 70/635 (2026.01); H10W 70/65 (2026.01); H10W 72/20 (2026.01); H10W 90/401 (2026.01); H10W 90/701 (2026.01); H10W 90/724 (2026.01); H10W 74/15 (2026.01); H10W 90/297 (2026.01); H10W 90/722 (2026.01); H10W 90/732 (2026.01); H10W 90/792 (2026.01);
Abstract

A semiconductor structure includes at least two chiplets, where each chiplet includes a top semiconductor device with frontside interconnect wiring contacting a substrate with through-silicon vias and the top semiconductor device contacts a bottom semiconductor device with backside interconnect wiring. At least a first bridge chip connects to a first portion of the backside interconnect wiring in each of the two chiplets and at least a second bridge chip connects the frontside interconnect wiring in each of the two chiplets to the substrate with the through-silicon vias in each of the two chiplets. The top semiconductor device and the bottom semiconductor device in each of the two chiplets are electrically connected.


Find Patent Forward Citations

Quick Actions:

Medikonda, Manasa. (2026). Dual-side bridge chips connecting two semiconductor chips with stacked semiconductor devices (U.S. Patent No. 12787880). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12787880

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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