The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2026

Filed:

Jul. 01, 2022
Applicant:

Altera Corporation, San Jose, CA (US);

Inventors:

Lai Guan Tang, Tanjung Bungah, MY;

Ankireddy Nalamalpu, Portland, OR (US);

Mahesh K. Kumashikar, Bangalore, IN;

Atul Maheshwari, Portland, OR (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 90/00 (2026.01); H10W 20/20 (2026.01); H10W 72/20 (2026.01); H10W 72/00 (2026.01);
U.S. Cl.
CPC ...
H10W 90/00 (2026.01); H10W 20/20 (2026.01); H10W 72/20 (2026.01); H10W 72/877 (2026.01); H10W 90/734 (2026.01);
Abstract

Systems and methods are provided for a modular die-to-die interconnect for integrated circuits in a three-dimensional arrangement. An integrated circuit system may include a first chiplet that includes a grid-based interconnect field and a second chiplet that includes a complementary grid-based interconnect field. A number of interconnects of the complementary grid-based interconnect field of the second chiplet are connected to a corresponding number of interconnects of the grid-based interconnect field of the first chiplet.


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Quick Actions:

Tang, Lai. (2026). Grid-based interconnect system for modular integrated circuit systems (U.S. Patent No. 12787864). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12787864

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