The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 03, 2026
Filed:
Jan. 09, 2023
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Jen-Chun Liao, Taipei City, TW;
Yen-Hung Chen, Hsinchu, TW;
Ching-Hua Hsieh, Hsinchu, TW;
Sung-Yueh Wu, Chiayi County, TW;
Chih-Wei Lin, Zhubei City, TW;
Kung-Chen Yeh, Taichung City, TW;
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Abstract
An integrated circuit package including integrated circuit dies and a method of forming are provided. The integrated circuit package may include a first integrated circuit die and a second integrated circuit die bonded to the first integrated circuit die. The first integrated circuit die may include a first substrate, a first interconnect structure, and a first bonding layer. The first interconnect structure may be between the first bonding layer and the first substrate. The second integrated circuit die may include a second substrate, a second interconnect structure, and a second bonding layer. The second interconnect structure may be between the second bonding layer and the second substrate. A first surface of the first bonding layer may be in direct contact with a first surface of the second bonding layer. A sidewall the first bonding layer and the first surface of the second bonding layer may form a first acute angle.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile