The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2026

Filed:

May. 29, 2024
Applicants:

Fuji Electric Co., Ltd., Kawasaki, JP;

Denso Corporation, Kariya-city, JP;

Inventors:

Naruhisa Nagata, Matsumoto-city, JP;

Yoshiyuki Sugahara, Yamagata-mura, JP;

Masanobu Iwaya, Matsumoto-city, JP;

Tomohiro Mimura, Kariya-city, JP;

Kensuke Hata, Kariya-city, JP;

Assignees:

FUJI ELECTRIC CO., LTD., Kawasaki, JP;

DENSO CORPORATION, Kariya-city, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/16 (2006.01); H01L 29/45 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01); H10D 12/01 (2025.01); H10D 62/832 (2025.01); H10D 64/62 (2025.01); H10D 64/66 (2025.01);
U.S. Cl.
CPC ...
H10D 62/8325 (2025.01); H10D 12/031 (2025.01); H10D 64/62 (2025.01); H10D 64/664 (2025.01);
Abstract

A method of manufacturing a silicon carbide semiconductor device includes preparing a silicon carbide semiconductor substrate in which, on a front surface of a starting substrate of a first conductivity type, a first semiconductor layer of the first conductivity type is provided, the first semiconductor layer having an impurity concentration lower than an impurity concentration of the starting substrate. Next, at the surface of the first semiconductor layer, a second semiconductor layer of a second conductivity type is formed. Next, at the surface of the second semiconductor layer, an ohmic electrode is formed. Next, at the surface of the ohmic electrode, a Ti film and a TiN film are sequentially deposited to form a barrier metal. Next, the barrier metal is subjected to a heat treatment to form an annealed barrier metal. The heat treatment is performed in a range of 550 degrees C. to 750 degrees C.


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Nagata, Naruhisa. (2026). Method of manufacturing silicon carbide semiconductor device and silicon carbide semiconductor device (U.S. Patent No. 12787394). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12787394

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