The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2026

Filed:

Feb. 02, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chi Huang, Changhua County, TW;

Che-Chia Hsu, Taoyuan City, TW;

Chih-Pin Tsao, Zhubei City, TW;

Chih-Hong Hwang, New Taipei City, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 30/67 (2025.01); H10D 30/69 (2025.01); H10D 62/10 (2025.01); H10D 62/13 (2025.01); H10D 64/01 (2025.01); H10D 84/01 (2026.01); H10D 84/03 (2025.01); H10D 84/85 (2025.01);
U.S. Cl.
CPC ...
H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/121 (2025.01); H10D 62/151 (2025.01); H10D 64/017 (2025.01); H10D 84/0128 (2025.01); H10D 84/013 (2025.01); H10D 84/038 (2025.01);
Abstract

Semiconductor structures and methods for manufacturing the same are provided. The method includes forming a first channel structure and a second channel structure and forming a first type of source/drain structures attached to opposite sides of the first channel structure and a second type of source/drain structures attached to opposite sides of the second channel structure. The method also includes forming a first gate dielectric layer having a first portion covering the first channel structure and a second portion covering the second channel structure and driving a first metal element into the first portion of the first gate dielectric layer. The method also includes forming a cap layer over both the first portion and the second portion of the first gate dielectric layer and performing an annealing process on the first gate dielectric layer under the cap layer.


Find Patent Forward Citations

Quick Actions:

Huang, Chi. (2026). Semiconductor structure with treated gate dielectric layer and method for manufacturing the same (U.S. Patent No. 12787360). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12787360

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