Logic die and semiconductor device including logic die

Abstract

Provided are a logic die for supporting direct interfacing between a memory die and a memory controller via a through silicon via (TSV) and a semiconductor device including the logic die. The semiconductor device includes a logic die including a memory controller, an interface circuit, and a plurality of TSVs arranged in a TSV region. A plurality of memory dies stacked vertically on the logic die, and connected to the plurality of TSVs. The memory controller operates in a first voltage domain, and the plurality of memory dies operate in a second voltage domain. The interface circuit includes a plurality of TSV circuit blocks connected to the plurality of TSVs. Each TSV circuit block is configured to convert a voltage level of a signal, transmitted via a corresponding TSV, between a first voltage level in the first voltage domain and a second voltage level in the second voltage domain.