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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12765353 B1

PDFFull Text
Date of Patent:
Oct. 13, 2026

Filed:

Nov. 18, 2022

Three dimensional (3d) memory device and fabrication method

Applicant:

Yangtze Memory Technologies Co., Ltd., Wuhan, CN;

Inventors:

Linchun Wu, Wuhan, CN;

Wenxi Zhou, Wuhan, CN;

Cuicui Kong, Wuhan, CN;

Zhiliang Xia, Wuhan, CN;

Zongliang Huo, Wuhan, CN;

Assignee:

Yangtze Memory Technologies Co., Ltd., Wuhan, CN;

Attorney:

Anova Law Group, PLLC

Primary Examiner:

Jessica S Manno

Assistant Examiner:

Bipana Adhikari Dawadi

Int. Cl.
CPC ...
H10W 20/42 (2026.01); G11C 16/04 (2006.01); H10B 43/10 (2023.01); H10B 43/27 (2023.01); H10B 43/40 (2023.01); H10W 20/41 (2026.01); H10W 80/00 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 20/42 (2026.01); G11C 16/0483 (2013.01); H10B 43/10 (2023.02); H10B 43/27 (2023.02); H10B 43/40 (2023.02); H10W 20/435 (2026.01); H10W 80/312 (2026.01); H10W 80/327 (2026.01); H10W 90/792 (2026.01);
Abstract

A 3D memory device includes a conductor/insulator stack, a channel hole structure extending through the conductor/insulator stack, and a staircase contact (SCT). The conductor/insulator stack includes a first conductive layer and a first dielectric layer alternatingly stacked. The SCT includes a conductive structure, extends through the first dielectric layer, contacts a second dielectric layer, and is electrically connected to the first conductive layer. The second dielectric layer is parallel to the first conductive layer.

Find Patent Forward Citations

Wu, Linchun. (2026). Three dimensional (3d) memory device and fabrication method (U.S. Patent No. 12765353). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12765353

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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