The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2026

Filed:

Apr. 28, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Harry-Hak-Lay Chuang, Hsinchu County, TW;

Hung-Cho Wang, Taipei City, TW;

Sheng-Chang Chen, Hsinchu County, TW;

Jun-Yao Chen, Taoyuan City, TW;

Chang-Jen Hsieh, Hsinchu City, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10N 50/80 (2023.01); H10B 61/00 (2023.01); H10N 50/01 (2023.01);
U.S. Cl.
CPC ...
H10N 50/80 (2023.02); H10B 61/22 (2023.02); H10N 50/01 (2023.02);
Abstract

A method for manufacturing a memory device includes forming a dielectric layer over a substrate, in which the substrate has a cell region and a logic region adjacent to the cell region. A bottom electrode, a memory layer, and a top electrode are formed in sequence over the cell region of the substrate. A first spacer is formed extending upwards from the bottom electrode. A second spacer is formed extending upwards from the dielectric layer and lining with sidewalls of the bottom electrode and the first spacer.


Find Patent Forward Citations

Chuang, Harry-Hak-Lay. (2026). Manufacturing method of memory device with removal of top electrode (U.S. Patent No. 12765268). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12765268

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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