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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12765055 B1

PDFFull Text
Date of Patent:
Oct. 13, 2026

Filed:

Jul. 31, 2023

Integrated circuit with active region jogs

Applicants:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Tsmc Nanjing Company Limited, Nanjing, CN;

Tsmc China Company Limited, Shanghai, CN;

Inventors:

Tian-Yu Xie, Shanghai City, CN;

Xin-Yong Wang, Shanghai City, CN;

Lei Pan, Shanghai City, CN;

Kuo-Ji Chen, New Taipei City, TW;

Assignees:

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;

TSMC NANJING COMPANY LIMITED, Nanjing, CN;

TSMC CHINA COMPANY LIMITED, Shanghai, CN;

Attorney:

Maschoff Brennan

Primary Examiner:

Nelson Garces

Int. Cl.
CPC ...
H10D 86/01 (2026.01); H10D 86/00 (2025.01); H10P 90/00 (2026.01); H10W 10/00 (2026.01); H10W 10/10 (2026.01); H10W 10/17 (2026.01); H10D 30/60 (2025.01);
U.S. Cl.
CPC ...
H10D 86/201 (2025.01); H10D 86/01 (2025.01); H10P 90/1906 (2026.01); H10W 10/014 (2026.01); H10W 10/061 (2026.01); H10W 10/17 (2026.01); H10W 10/181 (2026.01); H10D 30/60 (2025.01);
Abstract

An IC structure includes first and second gates, first and second source regions, a shared drain region, and an isolation region. The first gate has a first portion extending along a first direction and a second portion extending along a second direction. The second gate has a first portion extending along the first direction and a second portion extending along the second direction. The shared drain region extends from the first portion of the first gate to the first portion of the second gate. The first source region is spaced apart from the shared drain region by the first gate. The second source region is spaced apart from the shared drain region by the second gate. The isolation region is between the first portion of the first gate and the first portion of the second gate, and resembles a quadrilateral pattern bordering the shared drain region.

Find Patent Forward Citations

Xie, Tian-Yu. (2026). Integrated circuit with active region jogs (U.S. Patent No. 12765055). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12765055

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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