The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2026

Filed:

May. 10, 2024
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

Wei Cao, Fremont, CA (US);

Zhixin Cui, Nagoya, JP;

Koichi Matsuno, Fremont, CA (US);

Xiang Yang, Santa Clara, CA (US);

Masaaki Higashitani, Cupertino, CA (US);

Assignee:

Sandisk Technologies, Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 43/27 (2023.01); G11C 16/04 (2006.01); H10B 41/10 (2023.01); H10B 41/27 (2023.01); H10B 41/35 (2023.01); H10B 43/10 (2023.01); H10B 43/35 (2023.01); H10W 20/41 (2026.01);
U.S. Cl.
CPC ...
H10B 43/27 (2023.02); G11C 16/0483 (2013.01); H10B 41/10 (2023.02); H10B 41/27 (2023.02); H10B 41/35 (2023.02); H10B 43/10 (2023.02); H10B 43/35 (2023.02); H10W 20/435 (2026.01);
Abstract

A semiconductor device includes an alternating stack of insulating layers and electrically conductive layers, a memory opening vertically extending through the alternating stack, a memory opening fill structure located in the memory opening and including a memory film, a vertical semiconductor channel that is laterally surrounded by the memory film, a drain region contacting a first end portion of the vertical semiconductor channel, a dielectric core surrounded by the vertical semiconductor channel, and a core-bias electrode surrounded by the dielectric core. A source layer contacts a second end portion of the vertical semiconductor channel and an end portion of the core-bias electrode.


Find Patent Forward Citations

Cao, Wei. (2026). Three-dimensional semiconductor device containing core-bias electrode surrounded by vertical semiconductor channel and method of forming the same (U.S. Patent No. 12764960). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12764960

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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