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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12757776 B1

PDFFull Text
Date of Patent:
Oct. 06, 2026

Filed:

Jul. 01, 2022

Gate-all-around transistor circuit modification using direct contact and/or access probe points

Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Richard H. Livengood, San Jose, CA (US);

Muhammad Usman Raza, Fremont, CA (US);

Waqas Ali, San Jose, CA (US);

Tahir Malik, Portland, OR (US);

Shida Tan, Saratoga, CA (US);

Martin Von Haartman, Portland, OR (US);

Mauro Kobrinsky, Portland, OR (US);

Amir Raveh, Haifa, IL;

Clifford J. Engle, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:

Essential Patents Group, LLP

Primary Examiner:

Zandra V Smith

Assistant Examiner:

Krishna J Palaniswamy

Int. Cl.
CPC ...
H10W 72/00 (2026.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 62/13 (2025.01); H10W 20/41 (2026.01);
U.S. Cl.
CPC ...
H10W 72/00 (2026.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/121 (2025.01); H10D 62/156 (2025.01); H10W 20/427 (2026.01);
Abstract

Techniques and structures are disclosed related to coupling to gate-all-around transistors for test and/or debug of an integrated circuit. The gate-all-around transistors, which may also be referred to as 3D stacked transistors or ribbon-FET transistors are contacted directly from the back side or they are contacted using a dedicated probe point on the back side of the gate-all-around transistors. Such contact may be made to probe the devices and/or to provide edit wires to modify the integrated circuit.

Find Patent Forward Citations

Livengood, Richard. (2026). Gate-all-around transistor circuit modification using direct contact and/or access probe points (U.S. Patent No. 12757776). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12757776

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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