The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2026

Filed:

Jan. 02, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Yi-Hsiu Chen, Hsinchu, TW;

Olivia Pei-Hua Lee, Hsinchu, TW;

Kenichi Sano, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/43 (2025.01); H10D 30/01 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01);
U.S. Cl.
CPC ...
H10D 30/43 (2025.01); H10D 30/014 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/121 (2025.01); H10D 64/021 (2025.01); H10D 64/018 (2025.01);
Abstract

A method for manufacturing a semiconductor device includes: forming a semiconductor structure on a substrate; forming a blocking layer to cover side surfaces of spacers of the semiconductor structure by subjecting a nitrogen-containing dielectric material of the spacers to an azidation reaction with an azide compound and a click reaction with a plurality of precursor molecules, each of which includes a head group containing an alkyne radical and a tail group connected to the head group; forming a gate dielectric layer surrounding nanosheet segments of the semiconductor structure; removing the blocking layer; and forming a metal filling layer which is in direct contact with the spacers, and which surrounds the nanosheet segments and is separated from the nanosheet segments by the gate dielectric layer.


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