The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 2026
Filed:
Sep. 06, 2023
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventors:
Alexei Sadovnikov, Sunnyvale, CA (US);
Natalia Lavrovskaya, Santa Clara, CA (US);
Assignee:
Texas Instruments Incorporated, Dallas, TX (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10D 12/00 (2025.01); H01L 21/02 (2006.01); H01L 21/265 (2006.01); H01L 21/768 (2006.01); H10D 12/01 (2025.01); H10D 62/13 (2025.01); H10D 64/62 (2025.01); H10D 64/66 (2025.01); H10P 30/20 (2026.01); H10P 50/28 (2026.01); H10P 95/90 (2026.01); H10W 20/00 (2026.01);
U.S. Cl.
CPC ...
H10D 12/411 (2025.01); H10D 12/01 (2025.01); H10D 62/134 (2025.01); H10D 64/62 (2025.01); H10D 64/661 (2025.01); H10P 30/204 (2026.01); H10P 30/21 (2026.01); H10P 50/282 (2026.01); H10P 95/90 (2026.01); H10W 20/066 (2026.01);
Abstract
An integrated circuit includes a transistor that has an collector region, a base region laterally surrounded by the collector region, and an emitter region laterally surrounded by the base region. A silicide layer on the emitter region is laterally spaced apart from the base region by an unsilicided ring. The emitter region is laterally spaced apart from a base contact region that may be covered by a dielectric layer such as a gate oxide layer.