The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2026

Filed:

Jul. 15, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Shigeki Shimomura, Cupertino, CA (US);

Jonathan Tsung-Yung Chang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/4074 (2006.01); G11C 5/06 (2006.01); G11C 11/408 (2006.01); G11C 11/4094 (2006.01); H03K 19/017 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4074 (2013.01); G11C 5/06 (2013.01); G11C 11/4085 (2013.01); G11C 11/4094 (2013.01); H03K 19/01742 (2013.01);
Abstract

A memory device is provided. The memory device includes a bit cell having a first invertor connected between a first node and a second node and a second invertor connected between the first node and the second node. The first invertor and the second invertor are cross coupled at a first data node and a second data node. The memory device further includes a pull down circuit connected to the second node. The pull down circuit is operative to pull down a voltage of the second node below a ground voltage in response to an enable signal.


Find Patent Forward Citations

Shimomura, Shigeki. (2026). Memory device (U.S. Patent No. 12755773). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12755773

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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