The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2026

Filed:

Jul. 12, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventor:

Ta-Chun Lin, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/01 (2025.01); H10D 30/00 (2025.01); H10D 30/43 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01); H10D 64/23 (2025.01); H10D 64/27 (2025.01); H10D 84/01 (2026.01); H10D 84/83 (2025.01); H10D 84/85 (2025.01);
U.S. Cl.
CPC ...
H10D 84/83 (2025.01); H10D 30/014 (2025.01); H10D 30/0195 (2025.01); H10D 30/43 (2025.01); H10D 30/503 (2025.01); H10D 30/506 (2025.01); H10D 30/6735 (2025.01); H10D 62/121 (2025.01); H10D 64/015 (2025.01); H10D 64/017 (2025.01); H10D 64/018 (2025.01); H10D 64/258 (2025.01); H10D 64/518 (2025.01); H10D 84/0167 (2025.01); H10D 84/0184 (2025.01); H10D 84/8311 (2025.01); H10D 84/8316 (2025.01); H10D 84/851 (2025.01); H10D 30/6757 (2025.01);
Abstract

A semiconductor device structure and a formation method are provided. The method includes forming a fin structure over a substrate. The fin structure has multiple sacrificial layers and multiple semiconductor layers laid out in an alternating manner. The method also includes partially removing the fin structure to form a recess exposing side surfaces of the semiconductor layers and the sacrificial layers and forming multiple inner spacers covering the side surfaces of the sacrificial layers. The method further includes recessing the semiconductor layers from the side surfaces of the semiconductor layers after the inner spacers are formed and partially removing the inner spacers so that each of the inner spacers becomes thinner. In addition, the method includes forming an epitaxial structure on the side surfaces of the semiconductor layers.


Find Patent Forward Citations

Lin, Ta-Chun. (2026). Method for forming a semiconductor device by recessing semiconductor layers and inner spacers (U.S. Patent No. 12751079). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12751079

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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