The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 29, 2026
Filed:
Mar. 25, 2024
Applicant:
Micron Technology, Inc., Boise, ID (US);
Inventors:
Li-Te Chang, San Jose, CA (US);
Charles S. Kwong, Redwood City, CA (US);
Murong Lang, San Jose, CA (US);
Zhenming Zhou, San Jose, CA (US);
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/26 (2006.01); G06N 20/00 (2019.01); G11C 13/00 (2006.01); G11C 16/04 (2006.01); G11C 16/34 (2006.01); G11C 29/42 (2006.01); G11C 29/56 (2006.01);
U.S. Cl.
CPC ...
G11C 16/26 (2013.01); G06N 20/00 (2019.01); G11C 16/0433 (2013.01); G11C 16/3422 (2013.01); G11C 16/3431 (2013.01); G11C 29/42 (2013.01); G11C 29/56008 (2013.01); G11C 2013/0054 (2013.01); G11C 16/0483 (2013.01);
Abstract
Various embodiments use a cascade model to determine (e.g., predict or estimate) one or more read level voltage offsets used to read data from one or more memory cells of a memory device, which can be part of a memory sub-system.
Chang, Li-Te. (2026). Cascade model for determining read level voltage offsets based on wordline group memory cells (U.S. Patent No. 12749541). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12749541
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile