The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 22, 2026
Filed:
Mar. 18, 2025
Apple Inc., Cupertino, CA (US);
Supreet Jeloka, Austin, TX (US);
Bharan Giridhar, Palo Alto, CA (US);
Chandan Shantharaj, San Jose, CA (US);
Sahil Kapoor, San Jose, CA (US);
Bibo Li, San Jose, CA (US);
Sai Saketh Divvela, San Jose, CA (US);
Diwakar Agarwal, Milpitas, CA (US);
Apple Inc., Cupertino, CA (US);
Abstract
A double-pumped communications channel utilizing a double-edge-triggered flip-flop is disclosed. The double-edge-triggered flip-flop includes first and second latches configured to latch first and second bits, respectively, on respective ones of rising and falling edges of a clock signal. A shadow latch is coupled to an output of one of the first or second latches and is configured to, during a test mode, a third bit from the coupled one of the first or second latches. During an operational mode, the flip-flop circuit is configured to relay data, via a first output, on alternating edges of the clock signal. During a test mode, the flip-flop circuit is configured to relay test data on a clock edge opposite of the one to which the coupled one of the first or second latches is responsive. A plurality of double-edge-triggered flip-flop circuits may be coupled in series to form a communications channel.