The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 15, 2026
Filed:
Jun. 22, 2023
Applicant:
International Business Machines Corporation, Armonk, NY (US);
Inventors:
Juntao Li, Cohoes, NY (US);
Julien Frougier, Albany, NY (US);
Min Gyu Sung, Latham, NY (US);
Chanro Park, Clifton Park, NY (US);
Ruilong Xie, Niskayuna, NY (US);
Assignee:
International Business Machines Corporation, Armonk, NY (US);
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 62/10 (2025.01); H10D 30/01 (2025.01); H10D 30/43 (2025.01); H10D 30/67 (2025.01); H10D 64/01 (2025.01); H10D 84/01 (2026.01); H10D 84/03 (2025.01); H10D 84/85 (2025.01);
U.S. Cl.
CPC ...
H10D 62/121 (2025.01); H10D 30/014 (2025.01); H10D 30/43 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 64/017 (2025.01); H10D 84/0167 (2025.01); H10D 84/0188 (2025.01); H10D 84/038 (2025.01); H10D 84/85 (2025.01);
Abstract
Embodiments of the invention are directed to an integrated circuit (IC) that includes a channel that includes a nanosheet stack; an etch-stop isolation (ESI) region over the nanosheet stack; and a portion of a first type of gate element between the ESI region and the nanosheet stack. The ESI region is operable to prevent etching the portion of the first type of gate element that is between the ESI region and the nanosheet stack.