The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2026

Filed:

Sep. 06, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Jacob Vehonsky, Gilbert, AZ (US);

Onur Ozkan, Scottsdale, AZ (US);

Vinith Bejugam, Chandler, AZ (US);

Mao-Feng Tseng, Tempe, AZ (US);

Nicholas Haehn, Scottsdale, AZ (US);

Andrea Nicolas Flores, Chandler, AZ (US);

Ali Lehaf, Phoenix, AZ (US);

Benjamin Duong, Phoenix, AZ (US);

Joshua Stacey, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10H 20/85 (2025.01); H10H 20/01 (2025.01); H10H 20/854 (2025.01); H10H 20/856 (2025.01); H10H 20/857 (2025.01); H10W 70/692 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10H 20/8506 (2025.01); H10H 20/01 (2025.01); H10H 20/856 (2025.01); H10H 20/857 (2025.01); H10H 20/0363 (2025.01); H10H 20/0364 (2025.01);
Abstract

Embodiments of an integrated circuit (IC) package are disclosed. In some embodiments, the IC package includes a semiconductor die, a glass substrate, and a package substrate. The semiconductor die includes a micro light emitting diode (LED). The semiconductor die is at least partially embedded within the glass substrate and the glass substrate including a through glass via (TGV) embedded in the glass substrate wherein the TGV is electrically coupled to the semiconductor die to provide power to the micro LED. The package substrate that is coupled to the TGV.


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