The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2026

Filed:

Sep. 07, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Praveen Mosalikanti, Portland, OR (US);

Robert Mongrain, Phoenix, AZ (US);

Xingjian Cai, San Jose, CA (US);

Yihong Yang, Portland, OR (US);

Long Wang, El Dorado Hills, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/28 (2006.01); G01R 19/165 (2006.01); G06F 1/3228 (2019.01); H02J 7/80 (2026.01);
U.S. Cl.
CPC ...
G06F 1/28 (2013.01); G01R 19/16552 (2013.01); G06F 1/3228 (2013.01); H02J 7/80 (2026.01);
Abstract

Embodiments of a power regulation circuit that ameliorates a first and second droop in a power source voltage that powers a processing core are disclosed. The power regulation circuit includes a first droop detector, a second droop detector and a frequency slowdown detection circuit. The first droop detector generates a first droop detection signal in a first detection state in response to detecting a first droop in the power source voltage. The second droop detector generates a second droop detection signal in a second detection state in response to detecting a second droop in the power source voltage. The frequency slowdown detection circuit to generate a frequency slowdown signal in a slowdown state in response to at least one of the first droop detection signal being in the first detection state and the second droop detection signal being in the second detection state.


Find Patent Forward Citations

Mosalikanti, Praveen. (2026). Power regulation circuit for droop mitigation in a power source voltage that powers a processing core (U.S. Patent No. 12730490). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12730490

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…