The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 01, 2026
Filed:
Dec. 21, 2023
Applicant:
Adeia Semiconductor Bonding Technologies Inc., San Jose, CA (US);
Inventors:
Rajesh Katkar, Milpitas, CA (US);
Cyprian Emeka Uzoh, San Jose, CA (US);
Assignee:
Adeia Semiconductor Bonding Technologies Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 90/00 (2026.01); H10W 72/00 (2026.01); H10W 72/90 (2026.01); H10W 80/00 (2026.01);
U.S. Cl.
CPC ...
H10W 90/00 (2026.01); H10W 72/01935 (2026.01); H10W 72/01951 (2026.01); H10W 72/01953 (2026.01); H10W 72/01955 (2026.01); H10W 72/921 (2026.01); H10W 72/923 (2026.01); H10W 72/931 (2026.01); H10W 72/932 (2026.01); H10W 72/9415 (2026.01); H10W 72/952 (2026.01); H10W 80/023 (2026.01); H10W 80/312 (2026.01); H10W 90/792 (2026.01);
Abstract
A first conductive material having a first hardness is disposed within a recess or opening of a microelectronic component, in a first preselected pattern, and forms a first portion of an interconnect structure. A second conductive material having a second hardness different from the first hardness is disposed within the recess or opening in a second preselected pattern and forms a second portion of the interconnect structure.