The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2026

Filed:

Jul. 11, 2022
Applicant:

Icemos Technology Limited, Belfast, GB;

Inventors:

Aymeric Privat, Tempe, AZ (US);

Takeshi Ishiguro, Fukushima, JP;

Cathal Duffy, Belfast, GB;

Samuel J. Anderson, Tempe, AZ (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10P 95/00 (2026.01); C23C 16/24 (2006.01); C30B 25/18 (2006.01); C30B 29/36 (2006.01); H10D 30/66 (2025.01); H10D 62/10 (2025.01); H10D 62/832 (2025.01); H10P 14/20 (2026.01);
U.S. Cl.
CPC ...
H10P 95/11 (2026.01); C23C 16/24 (2013.01); C30B 25/18 (2013.01); C30B 29/36 (2013.01); H10D 30/66 (2025.01); H10D 62/111 (2025.01); H10D 62/8325 (2025.01); H10P 14/274 (2026.01); H10P 14/2904 (2026.01); H10P 14/2905 (2026.01); H10P 14/2925 (2026.01); H10P 14/3408 (2026.01);
Abstract

A semiconductor device has a first substrate made of a first semiconductor material, such as silicon. A sacrificial layer is formed over a first surface of the first substrate. A seed layer is formed over the sacrificial layer. A compliant layer is formed over a second surface of the first substrate opposite the first surface of the first substrate. A first semiconductor layer made of a second semiconductor material, such as silicon carbide, dissimilar from the first semiconductor material is formed over the sacrificial layer. The first substrate and sacrificial layer are removed leaving the first semiconductor layer substantially defect-free. The first semiconductor layer containing the second semiconductor material is formed at a temperature greater than a melting point of the first semiconductor material. A second semiconductor layer is formed over the first semiconductor layer with an electrical component formed in the second semiconductor layer.


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