Memory device, a memory system and an operation method

Abstract

A memory device includes a memory array and a control logic coupled to the memory array. The memory array includes memory blocks. Each memory block includes memory cell strings, and each memory cell string includes a first memory cell, second memory cells, and a third memory cell. The second memory cells are between the first memory cell and the third memory cell. The first memory cell is coupled to a bit line, the third memory cell is coupled to a source line, the first memory cell is coupled with a first dummy word line, the second memory cells are respectively coupled with second word lines, and the third memory cell is coupled with a third word line. The control logic is configured to prior to programming the second memory cells of a memory block of the memory blocks, determine a first average value of threshold voltages of third memory cells in the memory block, determine a difference value between the first average value and a first reference value, and based on the difference value less than a second reference value, program third memory cells in the memory block, such that the difference is greater than or equal to the second reference.