The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 18, 2026
Filed:
Dec. 22, 2021
Applicant:
Altera Corporation, San Jose, CA (US);
Inventors:
Mahesh K. Kumashikar, Bangalore, IN;
Ankireddy Nalamalpu, Portland, OR (US);
MD Altaf Hossain, Portland, OR (US);
Atul Maheshwari, Portland, OR (US);
Yuet Li, Fremont, CA (US);
Mahesh A. Iyer, Fremont, CA (US);
Assignee:
INTEL CORPORATION, SANTA CLARA, CA (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
U.S. Cl.
CPC ...
G06F 30/347 ; H03K 19/17736 ; G06F 2119/06 ; H03K 19/1776 ; H03K 19/17784 ;
Kumashikar, Mahesh. (2026). Power allocation using multiple voltage domains for programmable logic devices (U.S. Patent No. 12712548). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12712548
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile