The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2026

Filed:

Aug. 23, 2023
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventor:

Kyle K. Kirby, Eagle, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10W 90/00 (2026.01); H10W 80/00 (2026.01); H10W 90/20 (2026.01); H10W 90/26 (2026.01); H10W 72/90 (2026.01);
U.S. Cl.
CPC ...
H10W 90/00 (2026.01); H10W 72/923 (2026.01); H10W 72/952 (2026.01); H10W 80/011 (2026.01); H10W 80/102 (2026.01); H10W 80/312 (2026.01); H10W 80/327 (2026.01); H10W 80/701 (2026.01); H10W 90/26 (2026.01); H10W 90/297 (2026.01); H10W 90/792 (2026.01);
Abstract

A semiconductor device assembly is described that includes two semiconductor dies. The semiconductor dies each include a layer of dielectric material and a reservoir of conductive material located adjacent to openings in the layer of dielectric material. The opening at the layer of dielectric material of the first semiconductor die and the opening at the layer of dielectric material of the second semiconductor die are aligned to create an interconnect opening. The reservoirs of conductive material are heated to volumetrically expand the reservoirs of conductive material past one another such that they contact at respective non-horizontal surfaces to form an interconnect electrically coupling the semiconductor dies. In this way, a connected semiconductor device may be assembled.


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