Structures for reducing gap fill defects in a vertically stacked semiconductor device and methods for forming the same

Abstract

Vertically stacked semiconductor devices and methods of fabrication thereof that include a first semiconductor die bonded to a second device structure in a face-down configuration, a gap fill dielectric layer laterally surrounding the first semiconductor die, and a recess fill dielectric layer formed over the gap fill dielectric layer to fill concave recess defects in the gap fill dielectric that may result from cracks in the first semiconductor die. The recess fill dielectric layer may fill the entire volume of one or more concave recess defects in the gap fill dielectric material to a vertical depth of 5 μm or more below the backside surface of a semiconductor substrate of the first semiconductor die. Providing a recess fill dielectric layer within concave recess defects in the gap fill dielectric layer may result in enhanced protection against electrical arcing during subsequent processing steps and thereby provide improved device yields.