The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2026

Filed:

Sep. 12, 2024
Applicant:

Sandisk Technologies, Inc., Milpitas, CA (US);

Inventors:

Weiyi Li, Fremont, CA (US);

Jiacen Guo, Cupertino, CA (US);

Xiang Yang, Santa Clara, CA (US);

Assignee:

Sandisk Technologies, Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 16/16 (2006.01); H10W 90/00 (2026.01); H10W 90/24 (2026.01);
U.S. Cl.
CPC ...
G11C 16/16 (2013.01); G11C 16/0483 (2013.01); H10W 90/00 (2026.01); H10W 90/24 (2026.01);
Abstract

A memory apparatus and operating method are provided. The apparatus includes memory cells connected to word lines and configured to retain a threshold voltage corresponding to data states. The memory cells form a block including an unselected sub-block for an erase operation and a selected sub-block for the erase operation. A control means is configured to identify ones of the word lines of the unselected sub-block that are programmed. The control means applies a selected erase enable voltage to ones of the word lines of the selected sub-block while applying an unselected erase enable voltage to ones word lines of the unselected sub-block to erase the memory cells of the selected sub-block during the erase operation. The unselected erase enable voltage is different for ones of the word lines of the unselected sub-block that are programmed than for ones of the word lines of the unselected sub-block that are erased.


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