The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 2026

Filed:

May. 27, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventors:

Hsien-Wei Chen, Hsinchu City, TW;

Meng-Liang Lin, Hsinchu, TW;

Ying-Ju Chen, Tuku Township, TW;

Shin-Puu Jeng, Po-Shan Village, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10W 90/00 (2026.01); H10W 70/05 (2026.01); H10W 70/65 (2026.01); H10W 70/66 (2026.01); H10W 70/685 (2026.01); H10W 74/15 (2026.01);
U.S. Cl.
CPC ...
H10W 90/701 (2026.01); H10W 70/05 (2026.01); H10W 70/095 (2026.01); H10W 70/65 (2026.01); H10W 70/66 (2026.01); H10W 70/685 (2026.01); H10W 90/401 (2026.01); H10W 74/15 (2026.01); H10W 90/00 (2026.01); H10W 90/724 (2026.01); H10W 90/734 (2026.01);
Abstract

First redistribution interconnect structures having a respective uniform thickness throughout are formed on a top surface of a first adhesive layer over a first carrier wafer. Redistribution dielectric layers and additional redistribution interconnect structures are formed over the first redistribution interconnect structures to provide at least one redistribution structure. A respective set of one or more semiconductor dies is attached to each of the at least one redistribution structure. The first redistribution interconnect structures are physically exposed by removing the first carrier wafer and the first adhesive layer. Fan-out bump structures are formed on the physically exposed first planar surfaces of the first redistribution interconnect structures.


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