The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 04, 2026
Filed:
Dec. 28, 2022
International Business Machines Corporation, Armonk, NY (US);
Tao Li, Slingerlands, NY (US);
Ruilong Xie, Niskayuna, NY (US);
Tsung-Sheng Kang, Ballston Lake, NY (US);
Oleg Gluschenkov, Tannersville, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A semiconductor device includes a first field effect transistor (FET) and a second FET arranged under the first FET to form a stack on the frontside of a wafer. A Middle of Line (MOL) contact has a first end connected to a source or drain of the first FET, and a second end connected to a first voltage node. A direct backside contact is connected to a backside power delivery network, the direct backside contact has a first end connected to a source or drain of the second FET, and a second end connected to a second voltage node. A Back End of Line (BEOL) layer has an input signal line and an output signal line. A gate region connects the MOL contact to the input signal line at the BEOL. The first FET and the second FET are connected through the MOL contact to the output signal line.