The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 2026

Filed:

May. 28, 2024
Applicant:

Yangtze Memory Technologies Co., Ltd., Wuhan, CN;

Inventors:

Kun Zhang, Wuhan, CN;

Wenxi Zhou, Wuhan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 41/27 (2023.01); H10B 41/35 (2023.01); H10B 41/40 (2023.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01);
U.S. Cl.
CPC ...
H10B 41/27 (2023.02); H10B 41/35 (2023.02); H10B 41/40 (2023.02); H10B 43/27 (2023.02); H10B 43/35 (2023.02); H10B 43/40 (2023.02);
Abstract

Memory devices and methods for forming the same are disclosed. In certain aspects, a memory device includes a filling layer; a stack structure including interleaved conductive layers and dielectric layers; a channel structure extending through the stack structure and the filling layer. The channel structure includes a memory film and a semiconductor channel. The memory device also includes a doped semiconductor layer in contact with the semiconductor channel. The filling layer is between the doped semiconductor layer and the stack structure. The memory device further includes an insulating layer, and a source contact extending through the insulating layer and in contact with the doped semiconductor layer. The doped semiconductor layer is between the insulating layer and the filling layer.


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