The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 2026

Filed:

Jul. 24, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Meng-Han Lin, Hsinchu City, TW;

Chia-En Huang, Xinfeng Township, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/08 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4027 (2013.01); G11C 29/08 (2013.01);
Abstract

A memory circuit includes a memory array comprising a first portion comprising a plurality of first memory cells, and a second portion comprising a plurality of second memory cells. The memory circuit includes an input/output (I/O) circuit physically disposed next to the memory array along a first lateral direction. The I/O circuit is operatively coupled to the first portion and the second portion through a first access line and a second access line, respectively. The memory circuit includes a first pre-charge circuit physically disposed opposite the first portion from the I/O circuit, and configured to charge the first access line prior to accessing the first memory cells. The memory circuit includes a second pre-charge circuit physically disposed opposite the second portion from the first pre-charge circuit, and configured to charge at least a portion of the second access line prior to accessing the second memory cells.


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