The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2026

Filed:

Dec. 02, 2022
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Manjunath Subbanna, Bangalore, IN;

Ala Moradian, Sunnyvale, CA (US);

Errol Antonio C. Sanchez, Tracy, CA (US);

Zuoming Zhu, Sunnyvale, CA (US);

Peydaye Saheli Ghazal, Saratoga, CA (US);

Martin Jeffrey Salinas, San Jose, CA (US);

Aniketnitin Patil, San Jose, CA (US);

Raja Murali Dhamodharan, Madurai, IN;

Shu-Kwan Lau, Sunnyvale, CA (US);

Assignee:

APPLIED MATERIALS, INC., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/67 (2006.01); C23C 16/44 (2006.01); C23C 16/455 (2006.01); C30B 25/14 (2006.01); H10P 14/20 (2026.01); H10P 14/24 (2026.01); H10P 72/00 (2026.01); H10P 72/30 (2026.01); H10P 72/76 (2026.01);
U.S. Cl.
CPC ...
H10P 72/0402 (2026.01); C23C 16/4412 (2013.01); C23C 16/455 (2013.01); C23C 16/45502 (2013.01); C30B 25/14 (2013.01); H10P 14/20 (2026.01); H10P 14/24 (2026.01); H10P 72/0431 (2026.01); H10P 72/0432 (2026.01); H10P 72/33 (2026.01); H10P 72/7604 (2026.01);
Abstract

The present disclosure relates to batch processing apparatus, systems, and related methods and structures for epitaxial deposition operations. In one implementation, an apparatus for substrate processing includes a cassette. The cassette is at least partially supported by a pedestal assembly. The cassette includes a plurality of levels arranged vertically with respect to each other, each level of the plurality of levels including a support surface configured to support a substrate. A level spacing between adjacent levels of the plurality of levels is 25 mm or higher, and the level spacing is defined between the support surfaces of the adjacent levels.


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