Three dimensional heterogeneous integration with double-sided semiconductor dies and methods of forming the same

Abstract

An embodiment semiconductor device may include a semiconductor die stack having a first semiconductor die including a first front-side interconnect structure and a first back-side interconnect structure, and a second semiconductor die including a second front-side interconnect structure and a second back-side interconnect structure, such that the first back-side interconnect structure is electrically connected to the second front-side interconnect structure. The first semiconductor die may include a first central portion disposed between the first front-side interconnect structure and the first back-side interconnect structure, the second semiconductor die may include a second central portion disposed between the second front-side interconnect structure and the second back-side interconnect structure, and each of the first central portion and second central portion may include electrical circuit elements formed in or on a semiconductor substrate. Each of the first and second front-side interconnect structures and back-side interconnect structures may include interconnects formed within a dielectric layer.